Iceberg Quantum and Diraq Confirm Pinnacle’s Logical Advantage for Spin Qubits Using NVIDIA CUDA-Q Logical

Today we're announcing work done by Iceberg Quantum and Diraq, leveraging early access to the newly announced Logical layer of the NVIDIA CUDA-Q platform. The work demonstrated how Iceberg Quantum’s Pinnacle architecture can be implemented on Diraq's spin-qubit hardware platform while preserving Pinnacle's logical performance advantage.

It is often assumed that quantum low-density parity-check (qLDPC) architectures such as Pinnacle require significantly more complex quantum hardware than the surface code. This work shows that need not be the case. Pinnacle can be implemented on Diraq's hardware without demanding significantly more of the platform than a standard surface code approach.

The result is that the first version of Pinnacle enables Diraq to achieve a target 1,000 logical qubits with just 150,000 physical qubits, as reported in Diraq’s white paper, `The Case for Silicon`. Future versions of Pinnacle will continue to boost the logical efficiency of Diraq’s devices further.

Mapping Pinnacle to Diraq’s hardware

To establish this result, we embedded Pinnacle within Diraq's hardware architecture. We specified how physical qubits should be allocated, identified the exact codes that would be used, and showed how to generate the required connectivity by shuttling qubits around the array. In short, everything you need to compile logical circuits on Pinnacle down to physical operations on hardware.

The key design challenge was implementing Pinnacle's non-local connectivity while keeping shuttling distances small, since qubits accumulate errors as they are shuttled. Because Pinnacle is built from modular processing blocks, non-local connectivity is only ever needed within a block, never across the whole device. We then optimised the codes, circuits and shuttling schedules within each block so that shuttling contributes no more to the error budget than other sources, such as physical gates.

The result was that physical qubit counts from the Pinnacle paper agree with hardware-aware estimates on Diraq's hardware to within 5%, and numerical simulations including shuttling-dependent noise verified logical performance suitable for useful quantum computing. The takeaway is that it is possible to implement Pinnacle on spin qubits whilst maintaining its low overhead and logical performance.


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